News Stories and Press Releases
April 8, 2013
ST-MRAM gets practical
J. M. Slaughter, N.D. Rizzo, et.al., review key properties for commercial ST-MRAM circuits, discuss the challenges to achieving the many performance and scaling goals that are being addressed in current development around the world, recent results in the field, and present first results from a new, fully-functional 64-Mb, DDR3, ST-MRAM circuit.
March 26, 2013
Better, cheaper, faster ways for making (and destroying) memories
The workshop's keynote address, presented by Everspin Technologies Vice President of R&D Jon Slaughter. From the Non-Volatile Memories Workshop at the University of California - San Diego.
March 7, 2013
Everspin Revealing 1Mb Serial MRAM With Quad SPI Interface
Quad SPI, which has four serial I/O paths, is an evolutionary upgrade from SPI, which had one serial I/O path.
February 26, 2013
Everspin Announces 1-Megabit Serial MRAM With Quad SPI Interface
Everspin Technologies today announced the MR10Q010, a new 1-Megabit serial MRAM with a Quad SPI interface.
January 7, 2013
MRAM Momentum
by Bryon Moyer. A review of critical MRAM developments unfolded at IEDM.
January 2, 2013
Tech trends: Details on Everspin's ST-MRAM
By Kristin Lewotsky. Everspin turned heads a few weeks ago when it announced that it was sampling a 64-Mb DDR3 ST-MRAM.