Technical Papers

MRAM Improvements to Automotive Non-Volatile Memory Storage (white paper)

by Chuck Nguyen, Dona Burkard, Kelfin Dobbins (of Ford), and Chuck Bohac (of Everspin Technologies)

Automotive powertrain modules use Flash memory technology to retain critical control and diagnostic information during power off (keep-alive memory (KAM) and non-volatile memory (NVM)). Complex software must be designed to maximize the lifecycle of these devices because they have a limited number of write cycles. MRAM (Magneto resistive Random Access Memory) has the potential to eliminate this complexity and make the process of managing KAM and NVM easier and more robust. This paper demonstrates using off-board MRAM devices with a next generation of powertrain microprocessor. The prototype boards integrating the latest powertrain microcontroller, with the Everspin MRAM MRA16A (2 pcs of x16 bits) and MR2xH50 (@ a SCK 40MHz) chips were created. An investigation was performed evaluating the MRAM capabilities for storing and retrieving data during simulated key-off and key-on events.

Read the white paper


 Use MRAM to Optimize System Energy Consumption

By Duncan Bennett, Product Marketing Manager, Everspin Technologies, An investigation into whether the fast-write and power-up-to-write times for MRAM can significantly reduce total system energy consumption compared to either EEPROM or Flash.

Read the Article


 A Fully Functional 64 Mb DDR3 ST-MRAM Built on 90 nm CMOS Technology

“A Fully Functional 64 Mb DDR3 ST-MRAM Built on 90 nm CMOS Technology,”, N. D. Rizzo., D. Houssameddine, J. Janesky, R. Whig, F. B. Mancoff, M. L. Schneider, M. DeHerrera, J. J. Sun, K. Nagel, S. Deshpande, H.-J. Chia, S. M. Alam, T. Andre, S. Aggarwal, and J. M. Slaughter, IEEE Transactions on Magnetics 49, 4441 (2013).

Read the Article


 High Density ST-MRAM Technology

“High Density ST-MRAM Technology,”, J. M. Slaughter, N. D. Rizzo, J. Janesky, R. Whig, F. B. Mancoff, D. Houssameddine, J. J. Sun, S. Aggarwal, K. Nagel, S. Deshpande, S. M. Alam, T. Andre, and P. LoPresti, IEEE International Electron Devices Meeting 2012 p.29.3.1-4, December 2012.

 Read the Article


 A 180 Kbit Embeddable MRAM Memory Module.

J.J. Nahas, T.W. Andre, B. Garni, C. Subramanian, H. Lin, S.M. Alam, K. Papworth, W.L. Martino,IEEE Journal of Solid-State Circuits, Volume 43, Page(s):1826 - 1834, Aug. 2008.

Read the Abstract


 Status and Outlook of MRAM Memory Technology (Invited).

S. Tehrani, Electron Devices Meeting, 2006. IEDM '06. International, Page(s):1-4, Dec. 2006

Read the Abstract


 Intrinsic Reliability of AlOx-Based Magnetic Tunnel Junctions.

J. Akerman, M. DeHerrera, J.M. Slaughter, R. Dave, J.J. Sun, J.T. Martin, S. Tehrani, IEEE Transactions on Magnetics, Volume 42, Page(s):2661-2663, Oct. 2006.

Read the Abstract


 MgO-based Tunnel Junction Material for High-Speed Toggle MRAM.

Renu W. Dave, G. Steiner, J.M. Slaughter, J.J. Sun, B. Craigo, S. Pietambaram, K. Smith, G. Grynkewich, M. DeHerrera, J. Akerman, and S. Tehrani, IEEE Transactions on Magnetics Volume 42, pp. 1935 - 1939, August 2006.

Read the Abstract


 High Speed Toggle MRAM with MgO-Based Tunnel Junctions.

J.M. Slaughter, R.W. Dave, M. Durlam, G. Kerszykowski, K. Smith, K. Nagel, B. Feil, J. Calder, M. DeHerrera, B. Garni, and S. Tehrani, IEEE International Electron Devices Meeting 2005 p.35.7.1-3, December 2005.

Read the Abstract


 Reliability of 4 Mbit MRAM.

J. Akerman, P. Brown, D. Gajewski, M. Griswold, J. Janesky, M. Martin, H. Mekonnen, J.J. Nahas, S. Pietambaram, J.M. Slaughter, S. Tehrani, Proceedings. 43rd Annual Reliability Physics Symposium, 2005, Page(s):163-167, IEEE International, April 17-21, 2005.

Read the first page


 A 4-Mbit Toggle MRAM Based on a Novel Bit and Switching Method.

B.N. Engel, J. Akerman, B. Butcher, R.W. Dave, M. DeHerrera, M. Durlam, G. Grynkewich, J. Janesky, S.V. Pietambaram, N.D. Rizzo, J.M. Slaughter, K. Smith, J.J. Sun, and S. Tehrani, IEEE Transactions on Magnetics, vol. 41, pp. 132-136, (2005).

Read the Article


 A 4-Mb 0.18- mm 1T1MTJ toggle MRAM with balanced three input sensing scheme and locally mirrored unidirectional write drivers.

T.W. Andre, J.J. Nahas, C.K. Subramanian, B.J. Garni, H.S. Lin, A. Omair, W.L. Martino, Jr., IEEE Journal of Solid-State Circuits, Volume 40, Page(s):301 - 309, Jan. 2005

Read the Abstract


 A 0.18 mm 4Mb toggling MRAM.

M. Durlam, D. Addie, J. Akerman, B. Butcher, P. Brown, J. Chan, M. DeHerrera, B.N. Engel, B. Feil, G. Grynkewich, J. Janesky, M. Johnson, K. Kyler, J. Molla, J. Martin, K. Nagel, J. Ren, N.D. Rizzo, T. Rodriguez, L. Savtchenko, E.J. Salter, J.M. Slaughter, K. Smith, J.J. Sun, M. Lien, K. Papworth, P. Shah, W. Qin, R. Williams, L. Wise, and S. Tehrani, IEEE International Electron Devices Meeting 2003 p.34.6.1-3 (2003).

Read the Abstract