Published:
April 8, 2013
J. M. Slaughter, N.D. Rizzo, et.al., review key properties for commercial ST-MRAM circuits, discuss the challenges to achieving the many performance and scaling goals that are being addressed in current development around the world, recent results in the field, and present first results from a new, fully-functional 64-Mb, DDR3, ST-MRAM circuit.