Datasheets
MR4A16B_Datasheet.pdf
Datasheet for MR4A16B, 16 Mb, Parallel IO MRAM
Product Change Notices (PCNs)
PCN03043_CMOS_Fab_Supplier_Trace Code.pdf
Everspin is adding a character to the trace code on all Everspin products to identify CMOS wafer Fab supplier.
PCN02967 Moisture Sensitivity Level of the 16Mb MRAM in the 48-BGA Package Upgraded to MSL-3.pdf
The 16Mb MRAM in the 48-BGA is being upgraded from MSL-5 to MSL-3.
Add ChipMOS as a Subcontractor Assembly Site for 16Mb(x16) 54p TSOP2 package.v1.pdf
PCN1893 ALTERNATIVE FORMAT FOR TRACE CODES ON PACKAGE MARKING
Beginning December 30, 2011, Everspin may use an alternative Trace Code marking format interchangeably with the existing format. The existing format identifies fabrication site, assembly site, final test site and wafer lot, year and work week. The alternative format will identify the assembly site and wafer lot, year and work week. Affects all Everspin products and packages.
packaging
Everspin TSOP2 Package Guide.pdf
Thermal Resistance, Recommended reflow profile, package outline drawings for all TSOP2 packages from Everspin
application notes
EST 2130 Comparing_Technologies_FRAM_vs_MRAM_AppNote.pdf
Comparing MRAM to FRAM
Approximating the Magnetic Field When Using Everspin MRAM
How to create an approximation of the magnetic field strength surrounding an MRAM
technical articles & white papers
Cobham_MRAM_Qual_and_Reliability_paper 2020.pdf
Cobham Toggle MRAM Quality and Reliability White Paper
Toggle MRAM Quality and Reliability Paper
A white paper discussing the reliability and qualification for Toggle MRAM components by Cobham
MRAM Improvements to Automotive Non-Volatile Memory Storage
Automotive powertrain modules use flash memory technology to retain critical control and diagnostic information during power off (keep-alive memory (KAM) and non-volatile memory (NVM)). Complex software must be designed to maximize the lifecycle of these devices because they have a limited number of write cycles. MRAM (Magneto resistive Random Access Memory) has the potential to eliminate this complexity and make the process of managing KAM and NVM easier and more robust. This paper demonstrates using off-board MRAM devices with a next generation of powertrain microprocessor. The prototype boards integrating the latest powertrain microcontroller, with the Everspin MRAM MRA16A (2 pcs of x16 bits) and MR2xH50 (@ a SCK 40MHz) chips were created. An investigation was performed evaluating the MRAM capabilities for storing and retrieving data during simulated key-off and key-on events.
Toggle and Spin-Torque MRAM: Status and Outlook
Article by J.M. Slaughter, et.al., of Everspin Technologies
IBIS Model
verilog model
MR4A16B_verilog_model_1.1.zip
This is the VERILOG model of the MR4A16B. MR4A16B.V is the abstracted model of a 1Mb x 16 MRAM. The following is contained in the download: 1. Readme_MR4A16B - Overview 2. MR4A16B.V - Device Model 3. Config_MR4A16B.V - Configuration File
VHDL model
MR4A16B VHDL Model
This is the VHDL model of the MR4A16B. This is a high level abstraction of this product. The following is contained in the download: 1. Readme_MR4A16B 2. MR4A16B.vhdl - Device Model 3. Package_Utility - Standard Conversion Utilities 4. Benchtest.vhdl - Top Level Test Bench 5. MR4A16B_Driver.vhdl - Sample Test Vectors used for the Verification 6. MR4A16B.txt - Memory Initialization File
RoHS / REACH
RMI_EMRT_1.3_Everspin Technologies_07-29-2024_ Company level.xlsx
RMI_EMRT_1.3_Everspin Technologies_07-29-2024_ Product Level.xlsx
RMI_CMRT_6.4__Everspin Technologies_06.21.2024_ Product level.xlsx
RMI_EMRT_1.3_Everspin Technologies_5-13-2024_ Product level.xlsx
RMI_CMRT_6.4__Everspin Technologies_05.03.2024_ Company level.xlsx
RMI_CMRT_6.31_Everspin Technologies_10-24-2023_ Product level.xlsx
Everspin_RoHS_Red_Phosphorus_Compliance.pdf
RoHS Red Phosphorous statement
Everspin Conflict Minerals Report Fiscal 2019.pdf
Everspin Conflict Minerals Report Fiscal 2019