Documents for MR0A16AVMA35

Datasheets

Rev. 8.3 Effective Mar 27 2018

MR0A16A_Datasheet.pdf

Datasheet for MR0A16A, 1 Mb, Parallel IO MRAM

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Product Change Notices (PCNs)

Rev. 1 Effective Dec 30 2011

PCN1893 ALTERNATIVE FORMAT FOR TRACE CODES ON PACKAGE MARKING

Beginning December 30, 2011, Everspin may use an alternative Trace Code marking format interchangeably with the existing format. The existing format identifies fabrication site, assembly site, final test site and wafer lot, year and work week. The alternative format will identify the assembly site and wafer lot, year and work week. Affects all Everspin products and packages.

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Rev. 1 Effective Oct 11 2010

Burn-In, Final Test transferred to UTAC Taiwan for 256Kb, 1Mb, 4Mb Parallel IO and 256Kb and 1Mb Serial SPI MRAM

Burn-in, final test and end of line services are transferred from UTAC Singapore to UTAC Taiwan.

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packaging

Rev. 2.2 Effective Apr 13 2018

Everspin_48-ball BGA_Package_Guide.pdf

Thermal Resistance, Recommended reflow profile, package outline drawings for all 48-ball FBGA packages from Everspin

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application notes

Effective Jun 12 2020

EST 2130 Comparing_Technologies_FRAM_vs_MRAM_AppNote.pdf

Comparing MRAM to FRAM

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Rev. 1 Effective Sep 28 2015

EST02880 Magnetic Immunity for Everspin MRAM 073115.pdf

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Rev. 1 Effective Feb 1 2012

Approximating the Magnetic Field When Using Everspin MRAM

How to create an approximation of the magnetic field strength surrounding an MRAM

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technical articles & white papers

Rev. 1.0 Effective May 5 2020

Cobham_MRAM_Qual_and_Reliability_paper 2020.pdf

Cobham Toggle MRAM Quality and Reliability White Paper

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Rev. 1.0 Effective Mar 30 2020

Toggle MRAM Quality and Reliability Paper

A white paper discussing the reliability and qualification for Toggle MRAM components by Cobham

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Rev. 1.1 Effective Feb 9 2018

MRAM Improvements to Automotive Non-Volatile Memory Storage

Automotive powertrain modules use flash memory technology to retain critical control and diagnostic information during power off (keep-alive memory (KAM) and non-volatile memory (NVM)). Complex software must be designed to maximize the lifecycle of these devices because they have a limited number of write cycles. MRAM (Magneto resistive Random Access Memory) has the potential to eliminate this complexity and make the process of managing KAM and NVM easier and more robust. This paper demonstrates using off-board MRAM devices with a next generation of powertrain microprocessor. The prototype boards integrating the latest powertrain microcontroller, with the Everspin MRAM MRA16A (2 pcs of x16 bits) and MR2xH50 (@ a SCK 40MHz) chips were created. An investigation was performed evaluating the MRAM capabilities for storing and retrieving data during simulated key-off and key-on events.

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Rev. 1 Effective Jan 8 2010

Toggle and Spin-Torque MRAM: Status and Outlook

Article by J.M. Slaughter, et.al., of Everspin Technologies

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IBIS Model

Rev. 1 Effective Oct 8 2015

MR0A16AVMA35 IBIS

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Rev. 2 Effective Oct 7 2008

MR0A16AYS35 IBIS File

Ibis model for part MR0A16AYS35.

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Rev. 2 Effective Oct 7 2008

MR0A16ACYS35 IBIS File

Ibis model for part MR0A16ACYS35.

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RoHS / REACH

Rev. 1.0 Effective May 29 2020

Everspin Conflict Minerals Report Fiscal 2019.pdf

Everspin Conflict Minerals Report Fiscal 2019

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Effective Apr 23 2020

QUA00417_Everspin_reach.pdf

Everspin Technologies REACH Statement

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Effective Mar 27 2018

QUA02364_EverspinRoHS.pdf

Everspin Technologies RoHS Statement

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Rev. 4.20 Effective Dec 16 2016

EICC Product Level Master

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Rev. 4.20 Effective Dec 16 2016

EICC Company Level Master

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Effective Sep 23 2016

Everspin CFSI_CMRT by Product 4.10_09232016.xls

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Effective Sep 23 2016

Everspin CFSI_CMRT Company Level 4.10_09232016.xls

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Rev. 1.0 Effective Jan 24 2014

Everspin_RoHS_Red_Phosphorus_Compliance.pdf

RoHS Red Phosphorous statement

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