Enabling Xilinx FPGA Controllers for ST-DDR4 Persistent Memory
Spin-Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) is a persistent memory technology that delivers performance, persistence, and durability utilizing variants of industry standard interfaces. Everspin has introduced STT-MRAM products that utilize a variant of the JEDEC standard DDR4 interface, called ST-DDR4, that encompasses the unique functionality required for full system support. This document will help engineers understand how to enable a Xilinx FPGA memory controller to communicate with persistent ST-DDR4 memory.
ST-DDR4 Change Table V1 0.pdf
This app note shows the names of the fifteen modules that require changes from the standard Xilinx MIG controller for a XCKU060-2FFVA1156E device. When run properly, the example script will automate these changes for the user.
Xilinx ST-DDR4 TCL Script
Xilinx ST-DDR4 TCL script
Application Note Utilizing Everspin STT-MRAM in Enterprise SSDs
As Enterprise Solid State Drives (SSDs) continue to push the envelope in terms of system performance and smaller form factors, SSD solutions providers are facing greater challenges to increase performance and density while continuing to protect data-in-flight from power failures. NAND flash has not significantly increased in performance and the improvement in SSD performance is typically made by adding more parallel channels of flash. This increases the need for energy storage for power fail protection which in turn reduces space available for the storage array for a fixed form factor.
This application note explores the SSD architecture benefits of employing Everspin ST-MRAM on the DDR bus of the SSD controller to provide a high speed, non-volatile write buffer in order to reduce power fail energy storage while increasing performance and storage density.
Accelerating Fintech Applications with Lossless and Ultra-Low Latency Synchronous Logging using nvNITRO
Financial Technology (FinTech) companies are looking for performance increases that still enable them to remain in compliance by protecting data. The nvNITRO accelerator with MRAM memory can increase performance 9X by dramatically reducing latency, all while protecting the data with persistence and endurance.
EST02880 Magnetic Immunity for Everspin MRAM 073115.pdf
technical articles & white papers
Toggle and Spin-Torque MRAM: Status and Outlook
Article by J.M. Slaughter, et.al., of Everspin Technologies
RoHS / REACH
QUA00417_Everspin Reach Statement_SVHC197_2-25-19.pdf
Everspin Reach Statement - 2019
QUA00417_Everspin Reach Statement 3_27_2018.pdf
Everspin REACH statement
Everspin RoHS compliance
EICC Product Level Master
EICC Company Level Master
No Red Phosphorus content in Everspin products
Red Phosphorus Statement