Everspin Product Documentation

Datasheets

Rev. 8.3 Effective Jul 20 2015

MR0A08B, 128K x 8 MRAM

Datasheet for MR0A08B, 1Mb, Parallel IO MRAM

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Rev. 6.3 Effective Jul 20 2015

MR256A08B, 32K x 8 MRAM

Datasheet for MR256A08B, 256K, Parallel IO MRAM

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Rev. 3.2 Effective Jun 11 2015

MR256D08B, 32Kb x 8

Datasheet for MR256D08B, 256 Kb, Parallel IO, Dual Power Supply MRAM

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Rev. 9.2 Effective Jun 11 2015

MR25H10 Data Sheet

Datasheet for MR25H10, 1Mb Serial SPI MRAM

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Rev. 11.2 Effective Jun 11 2015

MR2xH40, 512K x 8 MRAM

Datasheet for MR2xH40, 4Mb Serial SPI MRAM

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Rev. 8.2 Effective Jun 11 2015

MR0A16A, 64K x 16 MRAM

Datasheet for MR0A16A, 1 Mb, Parallel IO MRAM

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Rev. 4.3 Effective Jun 11 2015

MR10Q010 Quad SPI MRAM

Datasheet for MR10Q010, 1Mb, Serial IO MRAM with Quad SPI interface

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Rev. 3.2 Effective Jun 11 2015

MR0D08B, 128K x 8 MRAM

Datasheet for MR0D08B, 1 Mb, Parallel IO, Dual Power Supply MRAM

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Rev. 1.2 Effective Jun 11 2015

MR0DL08B, Dual Supply 128K x 8 MRAM

Datasheet for MR0DL08B, Dual Supply 128K x 8 MRAM

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Rev. 2.2 Effective Jun 11 2015

MR256DL08B, Dual Supply 32K x 8 MRAM

Datasheet for MR256DL08B

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Rev. 9.2 Effective Jun 11 2015

MR25H256, 32K x 8 MRAM

Datasheet for MR25H256, 256K, Serial SPI MRAM

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Rev. 6.2 Effective Jun 11 2015

MR2A08A, 512K x 8 MRAM

Datasheet for MR2A08A, 4 Mb, Parallel IO MRAM

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Rev. 11.2 Effective Jun 11 2015

MR2A16A, 256K x 16 MRAM

Datasheet for MR2A16A, 4 Mb, Parallel IO MRAM

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Rev. 8.2 Effective Jun 11 2015

MR4A08B, 2Mb x 8 MRAM

Datasheet for MR4A08B, 16 Mb, Parallel IO MRAM

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Rev. 11.2 Effective Jun 11 2015

MR4A16B, 1Mb x 16 MRAM

Datasheet for MR4A16B, 16 Mb, Parallel IO MRAM

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Product Change Notices (PCNs)

Effective Jul 17 2015

Product Discontinuance of 32-SOIC Package

Everspin Technologies, Inc. is discontinuing the 32-pin Small Outline Integrated Circuit (32-SOIC) package type, affecting Everspin’s MR256A08BSO35, MR256A08BSO35R, MR256A08BCSO35, MR256A08BCSO35R, MR0A08BSO35, MR0A08BSO35R, MR0A08BCSO35, and MR0A08BCSO35R.
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Rev. 1 Effective Mar 13 2015

PCN02784 Mold Compound Change for 44pin TSOP2 for ASE-KH

To improve flexibility in manufacturing Everspin has qualified the 44 pin TSOP2 package from ASE-KH (Kaohsiung) with a new mold compound, G631H. This mold compound is already in use at other assembly sites.

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Rev. 1 Effective Nov 15 2014

PCN02370 Everspin is adding ASE-Malaysia as a qualified assembly site

In order to increase capacity and improve supply flexibility, Everspin is adding ASE-Malaysia as a qualified assembly site for 16Mb MRAM products in the 48-BGA package.

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Rev. 1 Effective Aug 29 2014

PCN02693A Add OSE as a qualified assembly subcontractor

To increase production capacity and improve flexibility in manufacturing Everspin has qualified an additional subcontractor, OSE, for assembly of the TSOP- 44 package.

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Rev. 1 Effective Jun 15 2013

PCN02542 Add TICP as a qualified source of the 16Mb X8 in the TSOP2 package

To increase production capacity and improve flexibility in manufacturing Everspin has qualified TICP as an additional assembly location for the 16Mb (x8) MRAM.

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Rev. 1 Effective Dec 15 2012

PCN02257 Everspin adds UTAC Dongguan (UDG) as a qualified source of the BGA package

Everspin adds UTAC Dongguan (UDG) as a qualified source of the BGA package

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Rev. 1 Effective Sep 30 2012

PCN20120628_0 A - Everspin qualifies ASE Malaysia as an assembly source for 256Kb and 1Mb MRAM in the BGA package

Everspin adds ASE Malaysia as a qualified source for BGA package assembly of 256Kb and 1Mb MRAM.

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Rev. 1 Effective Dec 30 2011

PCN1893 ALTERNATIVE FORMAT FOR TRACE CODES ON PACKAGE MARKING

Beginning December 30, 2011, Everspin may use an alternative Trace Code marking format interchangeably with the existing format. The existing format identifies fabrication site, assembly site, final test site and wafer lot, year and work week. The alternative format will identify the assembly site and wafer lot, year and work week. Affects all Everspin products and packages.

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Rev. 1 Effective Nov 18 2011

ASE QUALIFIED AS ADDITIONAL TSOP ASSEMBLY SITE

Everspin has qualified nine additional products for TSOP assembly at assembly subcontractor ASE. PCN date August 19, 2011, effective November 18, 2011

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Rev. 1 Effective Oct 11 2010

Burn-In, Final Test transferred to UTAC Taiwan for 256Kb, 1Mb, 4Mb Parallel IO and 256Kb and 1Mb Serial SPI MRAM

Burn-in, final test and end of line services are transferred from UTAC Singapore to UTAC Taiwan.

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Rev. 1 Effective Jan 15 2010

Add ASE as a qualified assembly subcontractor for 256Kb and 1Mb MRAM in TSOP2 packages

Add ASE (in addition to Freescale KLM) as a qualified assembly subcontractor.

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Rev. 1 Effective Dec 1 2009

Everspin Product Marking

Product marking change from Freescale logo to Everspin logo for 16 bit parallel IO family.

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Rev. 1 Effective Sep 18 2007

TSPG MCD MRAM MR2A16A MASK REVISION

Freescale is announcing improved MRAM MR2A16ATS35C devices.

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Rev. 1 Effective May 1 2007

FREESCALE PRODUCT BULLETIN 12665

TSPG MCD MR2A16A TEST AND B/I EXPANSION

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packaging

Rev. 2.0 Effective Feb 24 2015

Everspin 48-Ball FBGA Package Guide

Thermal Resistance, Recommended reflow profile, package outline drawings for all 48-ball FBGA packages from Everspin

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Rev. 1.2 Effective Feb 24 2015

Everspin SOIC MRAM Package Guide

Thermal Resistance, Recommended reflow profile, package outline drawings for all SOIC packages from Everspin

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Rev. 1.2 Effective Feb 24 2015

Everspin DFN MRAM Package Guide

Thermal Resistance, Recommended reflow profile, package outline drawings for all DFN packages from Everspin

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Rev. 1.2 Effective Oct 21 2014

Everspin TSOP2 MRAM Package Guide

Thermal Resistance, Recommended reflow profile, package outline drawings for all TSOP2 packages from Everspin

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product notes

Rev. 1 Effective May 14 2012

PNT02203 Product Note - Magnetic Immunity improvement on 1Mb (x16) and 4Mb (x16 and x8) TSOP2 Industrial and Extended Temp grades

PNT02203 Product Note - Magnetic Immunity improvement on 1Mb (x16) and 4Mb (x16 and x8) TSOP2 Industrial and Extended Temp grades

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Rev. 1 Effective May 9 2012

PNT02190 8-pin DFN Package with Reduced Exposed Pad Size Recommended for New Designs

PNT02190 8-pin DFN Package with Reduced Exposed Pad Size Recommended for New Designs

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Product Discontinuance Policy.pdf

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application notes

Effective Feb 13 2015

Using MRAM to Optimize System Energy Consumption 021215.pdf

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Rev. 1 Effective Dec 5 2014

Replacing the Cypress CY14U256LA-BA35 nvSRAM with Everspin's MR256DL08BMA45 MRAM

Replacing the Cypress CY14U256LA-BA35 nvSRAM with Everspin's MR256DL08BMA45 MRAM

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Effective Aug 1 2014

Replacing MR20H40DF commercial temperature grade part with MR20H40CDF industrial temperature grade

To simplify product selection and improve manufacturing efficiency, Everspin will discontinue the MR20H40DF (Commercial grade) and replace it with the MR20H40CDF (Industrial grade).

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Rev. 1 Effective Apr 1 2013

Replacing the Cypress CY14V101LA-BA45 nvSRAM with Everspin's MR0D08BMAxx MRAM

The Everspin MR0D08BBMA45 MRAM memory is pin and timing compatible with the Cypress CY14V101LA-BA45 nvSRAM.

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Rev. 1 Effective Mar 30 2013

Comparing Technologies FRAM vs. MRAM

Compares FRAM memory technology with Everspin's MRAM technology.

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Rev. 1 Effective Mar 30 2013

Replacing Cypress CY14B104LA_BA and ZS nvSRAMs with Everspin MR2A08B MRAM

Replacing Cypress CY14B104LA_BA and ZS nvSRAMs with Everspin MR2A08B MRAM

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Rev. 1 Effective Mar 18 2013

Replacing Cypress CY62168EV30LL-45BVXI MoBL SRAMs with Everspin MR4A08B MRAM

Replacing Cypress CY62168EV30LL-45BVXI MoBL SRAMs with Everspin MR4A08B MRAM

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Rev. 2 Effective Mar 1 2013

Replacing Cypress CY14B104NA BA and ZS nvSRAMs with Everspin MR2A16A MRAM

Replacing the Cypress CY14B104NA-BA/ZS45XI nvSRAM with Everspin's MR2A16Axxx35 MRAM

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Rev. 1 Effective Mar 1 2013

Replacing the Cypress CY14B108LA-xx 8Mb nvSRAM with Everspin's MR4A08Bxxx 16Mb MRAM

Replacing 8Mb nvSRAM with 16Mb MRAM in TSOP2 and FBGA packages.

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Rev. 1 Effective Feb 1 2013

Using a Single Vdd pin for the MR0D08BMA45

Describes the use of a single VDD supply for the MR0D08B MRAM Family in 48-BGA packages.

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Rev. 2 Effective Sep 18 2012

Replacing the Cypress CY14B256LA-SZ45 nvSRAM with Everspin MR256A08BxSO35 MRAM

Replacing the Cypress CY14B256LA-SZ45 nvSRAM with Everspin MR256A08BxSO35 MRAM

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Rev. 1 Effective Feb 1 2012

Approximating the Magnetic Field When Using Everspin MRAM

How to create an approximation of the magnetic field strength surrounding an MRAM

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Rev. 1 Effective Feb 1 2012

Replacing the Cypress CY14B256LA nvSRAM with Everspin MR256A08B MRAM

Considerations for replacing nvSRAM with MRAM

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Rev. 1 Effective Dec 1 2011

Replacing the Cypress CY14B101LA-xx nvSRAM with Everspin's MR0A08Bxxx MRAM

Considerations for replacing nvSRAM with MRAM

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Rev. 4 Effective Dec 1 2011

EVERSPIN's New 2mm Exposed Pad DFN Package Meets Both SOIC-8 and DFN8 PCB Layouts

Replacing SRAM in SOIC or DFN package with MRAM in DFN

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Quad SPI Evaluation Boards

Rev. 1 Effective Jul 11 2015

SPI Evaluation Board Buide

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Rev. 2 Effective Jun 24 2015

MRAM_MR10Q010.zip

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Rev. 1 Effective Jul 29 2014

MR10Q010 in 3.3v. I/O System Evaluation Board

Adapting MR10Q010 for Operation in a 3.3v I/O System

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MR10Q010-EVAL_PCB_GERBERS 041315.zip

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MRAM Example Code for Evaluation EVAL Board.zip

Example MRAM Code for the MR10Q010EVAL Evaluation Board

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MR10Q010-EVAL Board Layout and Schematic.pdf

MR10Q010 Evaluation Board Layout and Schematic

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EST02729_User_Guide_Quad_SPI_3.3v_IO_Evaluation_Board.pdf

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BAM01_PCB_GERBERS.zip

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MR10Q010-EVAL_PCB_GERBERS.zip

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MR10Q010-EVAL_SCH Schematics 021915.PDF

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technical articles & white papers

Rev. 1 Effective Jan 8 2010

Toggle and Spin-Torque MRAM: Status and Outlook

Article by J.M. Slaughter, et.al., of Everspin Technologies

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IBIS Model

Rev. 0.9 Effective Jul 16 2014

MR4A16BCYS35 IBIS File

Ibis model for part MR4A16BCYS35.

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Rev. 1 Effective Dec 6 2012

MR4A08BMA35 IBIS File

Ibis model for part MR4A08BMA35.

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Rev. 1 Effective Dec 6 2012

MR4A08BCMA35 IBIS File

Ibis model for part MR4A08BCMA35.

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Rev. 1 Effective Dec 6 2012

MR4A08BCYS35 IBIS File

Ibis model for part MR4A08BCYS35.

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Rev. 1 Effective Oct 30 2012

MR25H40CDF IBIS File

Ibis model for part MR25H40CDF.

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Rev. 0.92 Effective Apr 11 2011

MR256A08BCYS35 IBIS File.

Ibis model for part MR256A08BCYS35.

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Rev. 0.9 Effective Dec 3 2010

MR25H10CDC IBIS File

Ibis model for part MR25H10CDC.

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Rev. 2 Effective Jun 15 2010

MR0A16AVYS35 IBIS File

Ibis model for part MR0A16AVYS35.

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Rev. 0.92 Effective May 4 2010

MR0A08BYS35 IBIS File

Ibis model for part MR0A08BYS35.

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Rev. 0.9 Effective Mar 30 2010

MR4A16BMA35 IBIS File

Ibis model for part MR4A16BMA35.

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Rev. 0.9 Effective Mar 30 2010

MR4A16BCMA35 IBIS File

Ibis model for part MR4A16BCMA35.

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Rev. 2 Effective Oct 7 2008

MR2A16ACYS35 IBIS File

Ibis model for part MR2A16ACYS35.

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Rev. 2 Effective Oct 7 2008

MR0A16ACYS35 IBIS File

Ibis model for part MR0A16ACYS35.

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Rev. 2 Effective Oct 7 2008

MR0A16AYS35 IBIS File

Ibis model for part MR0A16AYS35.

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Rev. 2 Effective May 13 2008

MR2A16AVYS35 IBIS File

Ibis model for part MR2A16AVYS35.

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Rev. 2 Effective May 13 2008

MR2A16AYS35 IBIS File

Ibis model for part MR2A16AYS35.

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MR10Q010 IBIS File for 16-SOIC.ibs

IBIS file for part MR10Q010CSC in 16-SOIC.  Revision 0, dated March 23, 2015

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verilog model

Rev. 1 Effective Jan 21 2014

MR10Q010 VERILOG Model

This is the VERILOG model of the MR10Q010 Quad SPI MRAM.
The following is contained in the download:
1. Verilog Model Read Me File MR10Q010
2. MR10Q010 Device Model.

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Rev. 2 Effective Feb 10 2011

MR0A16A VERILOG Model

This is the VERILOG model of the MR0A16A. MR0A16A.V is the abstracted model of a 64K x 16 MRAM. The following is contained in the download:
1. Readme_MR0A16A - Overview
2. MR0A16A.V - Device Model
3. Config_MR0A16A.V - Configuration File
4. testbench_MR0A16A.v - Test bench file

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Rev. 2 Effective Feb 8 2011

MR2A16A VERILOG Model

This is the VERILOG model of the MR2A16A. MR2A16A.V is the abstracted model of a 256K x 16 MRAM. The following is contained in the download:
1. Readme_MR2A16A - Overview
2. MR2A16A.V - Device Model
3. Config_MR2A16A.V - Configuration File
4. testbench_MR2A16A.v - Test bench file

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Rev. 1 Effective Sep 26 2010

MR25H10 VERILOG Model

This is the VERILOG model of the MR25H10. MR25H10.V is the abstracted model of the 1Mb SPI MRAM. The following is contained in the download:
1. Readme_MR25H10 - Overview
2. MR25H10.V - Device Model
3. Config_MR25H10.V - Configuration File

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Rev. 1 Effective Sep 26 2010

MR0A08B VERILOG Model

This is the VERILOG model of the MR0A08B. MR0A08B.V is the abstracted model of a 128K x 8 MRAM. The following is contained in the download:
1. Readme_MR0A08B - Overview
2. MR0A08B.V - Device Model
3. Config_MR0A08B.V - Configuration File

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Rev. 1 Effective Sep 26 2010

MR2A08A VERILOG Model

This is the VERILOG model of the MR2A08A. MR2A08A.V is the abstracted model of a 512K x 8 MRAM. The following is contained in the download:
1. Readme_MR2A08A - Overview
2. MR2A08A.V - Device Model
3. Config_MR2A08A.V - Configuration File

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Rev. 1 Effective Sep 26 2010

MR4A16B VERILOG Model

This is the VERILOG model of the MR4A16B. MR4A16B.V is the abstracted model of a 1Mb x 16 MRAM. The following is contained in the download:
1. Readme_MR4A16B - Overview
2. MR4A16B.V - Device Model
3. Config_MR4A16B.V - Configuration File

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Rev. 1 Effective Sep 26 2010

MR4A08B VERILOG Model

This is the VERILOG model of the MR4A08B. MR4A08B.V is the abstracted model of a 2Mb x 8 MRAM. The following is contained in the download:
1. Readme_MR4A08B - Overview
2. MR4A08B.V - Device Model
3. Config_MR4A08B.V - Configuration File

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Rev. 1 Effective Sep 26 2010

MR25H256 VERILOG Model

This is the VERILOG model of the MR25H256. MR25H256.V is the abstracted model of the 256Kb SPI MRAM. The following is contained in the download:
1. Readme_MR25H256 - Overview
2. MR25H256.V - Device Model
3. Config_MR25H256.V - Configuration File

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Rev. 1 Effective Sep 26 2010

MR256A08B VERILOG Model

This is the VERILOG model of the MR256A08B. MR256A08B.V is the abstracted model of a 32K x 8 MRAM. The following is contained in the download:
1. Readme_MR256A08B - Overview
2. MR256A08B.V - Device Model
3. Config_MR256A08B.V - Configuration File

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VHDL model

Rev. 2 Effective Jan 25 2011

MR4A16B VHDL Model

This is the VHDL model of the MR4A16B. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR4A16B
2. MR4A16B.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR4A16B_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR4A16B.txt - Memory Initialization File

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Rev. 1 Effective Aug 27 2010

MR25H10 VHDL Model

This is the VHDL model of the MR25H10. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR25H10
2. MR25H10.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR25H10_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR25H10.txt - Memory Initialization File

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Rev. 1 Effective Aug 27 2010

MR25H256 VHDL Model

This is the VHDL model of the MR25H256. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR25H256
2. MR25H256.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR25H256_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR25H256.txt - Memory Initialization File

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Rev. 1 Effective Aug 4 2010

MR2A16A VHDL Model

This is the VHDL model of the MR2A16A. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR2A16A
2. MR2A16A.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR2A16A_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR2A16A.txt - Memory Initialization File

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Rev. 1 Effective Aug 4 2010

MR256A08B VHDL Model

This is the VHDL model of the MR256A08B. This is a high level abstraction of this product. The following is contained in the download: 1. Readme_MR256A08B 2. MR256A08B.vhdl - Device Model 3. Package_Utility - Standard Conversion Utilities 4. Benchtest.vhdl - Top Level Test Bench 5. MR256A08B_Driver.vhdl - Sample Test Vectors used for the Verification 6. MR256A08B.txt - Memory Initialization File

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Rev. 1 Effective Jul 30 2010

MR0A08B VHDL Model

This is the VHDL model of the MR0A08B. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR0A08B
2. MR0A08B.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR0A08B_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR0A08B.txt - Memory Initialization File

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Rev. 1 Effective Jul 30 2010

MR2A08A VHDL Model

This is the VHDL model of the MR2A08A. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR2A08A
2. MR2A08A.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR2A08A_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR2A08A.txt - Memory Initialization File

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RoHS / REACH

Rev. 4 Effective Jun 15 2015

Statement of RoHS Compliance

Statement of RoHS and Halogen- Free Compliance

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Rev. 7 Effective Jun 15 2015

Everspin REACH Statement

Statement of REACH material content

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Rev. 5 Effective Jun 8 2015

EICC Product Level Master

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Rev. 5 Effective Jun 8 2015

EICC Company Level Master

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Effective Jan 23 2015

Everspin_Technologies_ISO-14001-2004-JASANZcertificate.pdf

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Effective Dec 22 2014

QUA02364_Everspin_RoHS_compliance.pdf

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Rev. 2 Effective Jan 24 2014

No Red Phosphorus content in Everspin products

Red Phosphorus Statement

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Effective Nov 13 2012

QUA00399_Everspin_Certificate_of_Registration_for_ISO2008.pdf

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Everspin_EICC_Compliance_Statement (1).pdf

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QUA02601_Everspin_ConflictFree_Minerals_Policy.pdf

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