Documents for MR25H10MDF

Datasheets

Rev. 9.5 Effective Mar 27 2018

MR25H10_Datasheet.pdf

Datasheet for MR25H10, 1Mb Serial SPI MRAM

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Product Change Notices (PCNs)

Effective Oct 21 2021

PCN03043_CMOS_Fab_Supplier_Trace Code.pdf

Everspin is adding a character to the trace code on all Everspin products to identify CMOS wafer Fab supplier.

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Effective Jan 29 2018

PCN02996 Add ChipMOS as a Subcontractor Assembly Site for the DFN package

PCN 02996 - Add ChipMOS as a subcontractor assembly site

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Effective Dec 23 2016

PCN02969 Add Amkor Philippines as a Subcontractor Assembly Site for the DFN small flag package.pdf

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Rev. 1 Effective Dec 30 2011

PCN1893 ALTERNATIVE FORMAT FOR TRACE CODES ON PACKAGE MARKING

Beginning December 30, 2011, Everspin may use an alternative Trace Code marking format interchangeably with the existing format. The existing format identifies fabrication site, assembly site, final test site and wafer lot, year and work week. The alternative format will identify the assembly site and wafer lot, year and work week. Affects all Everspin products and packages.

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packaging

Rev. 1.5 Effective Sep 20 2023

Everspin DFN Package Guide Rev1.5.pdf

Everspin DFN package guide

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Rev. 5 Effective Apr 14 2013

EST02153_Everspins Small Flag DFN Replaces SOIC Package_AppNote_Rev5 041413.pdf

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product notes

Rev. 2 Effective Oct 13 2016

PNT02190 8-pin DFN Package with Reduced Exposed Pad Size Recommended for New Designs

PNT02190 8-pin DFN Package with Reduced Exposed Pad Size Recommended for New Designs

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application notes

Rev. 1.0 Effective Aug 12 2020

EST_2917_Everspin_MRAM_Optimizes_System_Energy_Consumption.pdf

Everspin MRAM Optimizes System Energy Consumption (Reprint of article)

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Effective Jun 12 2020

EST 2130 Comparing_Technologies_FRAM_vs_MRAM_AppNote.pdf

Comparing MRAM to FRAM

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Rev. 1 Effective Sep 28 2015

EST02880 Magnetic Immunity for Everspin MRAM 073115.pdf

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Rev. 1 Effective Feb 1 2012

Approximating the Magnetic Field When Using Everspin MRAM

How to create an approximation of the magnetic field strength surrounding an MRAM

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Rev. 4 Effective Dec 1 2011

EVERSPIN's New 2mm Exposed Pad DFNPackage Meets Both SOIC-8 and DFN8 PCB Layouts

Replacing SRAM in SOIC or DFN package with MRAM in DFN

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Quad SPI Evaluation Boards

Rev. 1 Effective Oct 6 2015

SPI Evaluation Board Guide

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technical articles & white papers

Rev. 1.0 Effective May 5 2020

Cobham_MRAM_Qual_and_Reliability_paper 2020.pdf

Cobham Toggle MRAM Quality and Reliability White Paper

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Rev. 1.0 Effective Mar 30 2020

Toggle MRAM Quality and Reliability Paper

A white paper discussing the reliability and qualification for Toggle MRAM components by Cobham

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Rev. 1.1 Effective Feb 9 2018

MRAM Improvements to Automotive Non-Volatile Memory Storage

Automotive powertrain modules use flash memory technology to retain critical control and diagnostic information during power off (keep-alive memory (KAM) and non-volatile memory (NVM)). Complex software must be designed to maximize the lifecycle of these devices because they have a limited number of write cycles. MRAM (Magneto resistive Random Access Memory) has the potential to eliminate this complexity and make the process of managing KAM and NVM easier and more robust. This paper demonstrates using off-board MRAM devices with a next generation of powertrain microprocessor. The prototype boards integrating the latest powertrain microcontroller, with the Everspin MRAM MRA16A (2 pcs of x16 bits) and MR2xH50 (@ a SCK 40MHz) chips were created. An investigation was performed evaluating the MRAM capabilities for storing and retrieving data during simulated key-off and key-on events.

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Rev. 1 Effective Jan 8 2010

Toggle and Spin-Torque MRAM: Status and Outlook

Article by J.M. Slaughter, et.al., of Everspin Technologies

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IBIS Model

Effective Oct 8 2015

MR25H10DC IBIS

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verilog model

Rev. 1 Effective Sep 26 2010

MR25H10 VERILOG Model

This is the VERILOG model of the MR25H10. MR25H10.V is the abstracted model of the 1Mb SPI MRAM. The following is contained in the download:
1. Readme_MR25H10 - Overview
2. MR25H10.V - Device Model
3. Config_MR25H10.V - Configuration File

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VHDL model

Rev. 1 Effective Aug 27 2010

MR25H10 VHDL Model

This is the VHDL model of the MR25H10. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR25H10
2. MR25H10.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR25H10_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR25H10.txt - Memory Initialization File

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RoHS / REACH

Rev. 1.2 Effective Oct 24 2023

RMI_EMRT_1.2_Everspin Technologies_10-24-2023_ Product level.xlsx

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Rev. 6.31 Effective Oct 24 2023

RMI_CMRT_6.31_Everspin Technologies_10-24-2023_ Product level.xlsx

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Rev. 1.0 Effective Jan 26 2023

Everspin_RoHS_Red_Phosphorus_Compliance.pdf

RoHS Red Phosphorous statement

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Rev. 6.1 Effective Mar 31 2022

RMI_CMRT_6.1_Everspin_Company Level_March 31 2022.xlsx

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Effective Mar 2 2022

QUA00417_Everspin_reach.pdf

Everspin Technologies REACH Statement

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Effective Mar 2 2022

QUA02364_EverspinRoHS.pdf

Everspin Technologies RoHS Statement

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Rev. 1.0 Effective May 29 2020

Everspin Conflict Minerals Report Fiscal 2019.pdf

Everspin Conflict Minerals Report Fiscal 2019

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Rev. 4.20 Effective Dec 16 2016

EICC Product Level Master

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Rev. 4.20 Effective Dec 16 2016

EICC Company Level Master

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Effective Sep 23 2016

Everspin CFSI_CMRT by Product 4.10_09232016.xls

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Effective Sep 23 2016

Everspin CFSI_CMRT Company Level 4.10_09232016.xls

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