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| At Everspin our goal is to provide you with all the information you need to design with Everspin products. You can access the available information for this product or product family through the links on the left. If you have questions or need more information please contact us and we will provide what you need.
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| MR0A08B, 128K x 8 MRAM |
| Datasheet for MR0A08B, 1Mb, Parallel IO MRAM |
| created on December-16-2011 |
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| MR0A16A, 64K x 16 MRAM |
| Datasheet for MR0A16A, 1 Mb, Parallel IO MRAM |
| created on December-09-2011 |
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| MR256A08B, 32K x 8 MRAM |
| Datasheet for MR256A08B, 256K, Parallel IO MRAM |
| created on December-16-2011 |
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| MR25H10, 128K x 8 MRAM |
| Datasheet for MR25H10, 1Mb, Serial SPI MRAM |
| created on November-18-2011 |
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| MR25H256, 32K x 8 MRAM |
| Datasheet for MR25H256, 256K, Serial SPI MRAM |
| created on November-18-2011 |
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| MR2A08A, 512K x 8 MRAM |
| Datasheet for MR2A08A, 4 Mb, Parallel IO MRAM |
| created on December-16-2011 |
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| MR2A16A, 256K x 16 MRAM |
| Datasheet for MR2A16A, 4 Mb, Parallel IO MRAM |
| created on December-16-2011 |
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| MR4A08B, 2Mb x 8 MRAM |
| Datasheet for MR4A08B, 16 Mb, Parallel IO MRAM |
| created on September-14-2011 |
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| MR4A16B, 1Mb x 16 MRAM |
| Datasheet for MR4A16B, 16 Mb, Parallel IO MRAM |
| created on October-28-2011 |
Download
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| MR0D08B, 128K x 8 MRAM |
| Datasheet for MR0D08B, 1 Mb, Parallel IO, Dual Power Supply MRAM |
| created on December-09-2011 |
Download
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| MR25H40, 512K x 8 MRAM |
| Datasheet for MR25H40 , 4Mb Serial SPI MRAM |
| created on November-18-2011 |
Download
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| MR256D08B, 32Kb x 8 |
| Datasheet for MR256D08B, 256 Kb, Parallel IO, Dual Power Supply MRAM |
| created on December-09-2011 |
Download
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| Errata for MR25H10 Code UCY8934ES |
| Errata for Engineering Samples Date Code UCY8934ES |
| created on September-01-2009 |
Download
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| Errata to MR25H256 and MR25H10 Datasheets Output Valid (tV) Timing |
| Provides more detail for Output Valid timing specifications vs.VDD and Industrial and AEC-Q100 temperature ranges. |
| created on November-15-2011 |
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| MR0A08BYS35 IBIS File |
| Ibis model for part MR0A08BYS35. |
| created on April-29-2010 |
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| MR0A08BMA35 IBIS File |
| Ibis model for part MR0A08BMA35. |
| created on April-29-2010 |
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| MR0A16ACYS35 IBIS File |
| Ibis model for part MR0A16ACYS35. |
| created on October-07-2008 |
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| MR0A16AYS35 IBIS File |
| Ibis model for part MR0A16AYS35. |
| created on October-07-2008 |
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| MR0A16AVYS35 IBIS File |
| Ibis model for part MR0A16AVYS35. |
| created on May-01-2010 |
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| MR256A08BCYS35 IBIS File. |
| Ibis model for part MR256A08BCYS35. |
| created on April-11-2011 |
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| MR2A16ACYS35 IBIS File |
| Ibis model for part MR2A16ACYS35. |
| created on October-07-2008 |
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| MR2A16AVYS35 IBIS File |
| Ibis model for part MR2A16AVYS35. |
| created on May-13-2008 |
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| MR2A16AYS35 IBIS File |
| Ibis model for part MR2A16AYS35. |
| created on May-13-2008 |
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| MR4A16BMA35 IBIS File |
| Ibis model for part MR4A16BMA35. |
| created on March-30-2010 |
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| MR4A16BCMA35 IBIS File |
| Ibis model for part MR4A16BCMA35. |
| created on March-30-2010 |
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| MR4A16BCYS35 IBIS File |
| Ibis model for part MR4A16BCYS35. |
| created on March-30-2010 |
Download
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| Recommended Soldering Profile |
| Recommended soldering reflow profile for Everspin products following IPC/JEDEC J-STD-020D.1. |
| created on November-03-2009 |
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| MR0A16AVYS35-Thermal Resistance |
| Maximum power dissipation from the MR0A16AVYS35 is calculated, Thermal Resistances given |
| created on August-31-2010 |
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| MR2A08AMA35-Thermal Resistance |
| Maximum power dissipation from the MR2A08AMA35 is calculated, Thermal Resistances given |
| created on August-09-2010 |
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| MR2A16AMA35-Thermal Resistance |
| Maximum power dissipation from the MR2A16AMA35 is calculated, Thermal Resistances given |
| created on October-01-2009 |
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| MR2A16AVYS35-Thermal Resistance |
| Maximum power dissipation from the MR2A16AVYS35 is calculated |
| created on March-19-2010 |
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| Everspin Product Marking |
| Product marking change from Freescale logo to Everspin logo for 16 bit parallel IO family. |
| created on January-01-2008 |
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| ASSEMBLY SUBCONTRACTOR |
| Add ASE (in addition to Freescale KLM) as a qualified assembly subcontractor. |
| created on January-15-2010 |
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| Final test site transfer |
| Burn-in, final test and end of line services are transferred from UTAC Singapore to UTAC Taiwan. |
| created on October-07-2010 |
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| ALTERNATIVE FORMAT FOR TRACE CODES ON PACKAGE MARKING |
| Beginning December 30, 2011, Everspin may use an alternative Trace Code marking format interchangeably with the existing format. The existing format identifies fabrication site, assembly site, final test site and wafer lot, year and work week. The alternative format will identify the assembly site and wafer lot, year and work week. Affects all Everspin products and packages. |
| created on November-30-2011 |
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| ASE QUALIFIED AS ADDITIONAL TSOP ASSEMBLY SITE |
Everspin has qualified nine additional products for TSOP assembly at assembly subcontractor ASE.
PCN date August 19, 2011, effective November 18, 2011 |
| created on August-17-2011 |
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| TSPG MCD MRAM MR2A16A MASK REVISION |
| Freescale is announcing improved MRAM MR2A16ATS35C devices. |
| created on September-01-2007 |
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| Statement of RoHS Compliance |
| Statement of RoHS and Halogen- Free Compliance |
| created on November-28-2011 |
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| No Red Phosphorus content in Everspin products |
| Red Phosphorus Statement |
| created on October-31-2011 |
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| Everspin REACH Statement |
| Statement of REACH material content |
| created on January-13-2012 |
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| MR0A08B VERILOG Model |
This is the VERILOG model of the MR0A08B. MR0A08B.V is the abstracted model of a 128K x 8 MRAM. The following is contained in the download:
1. Readme_MR0A08B - Overview
2. MR0A08B.V - Device Model
3. Config_MR0A08B.V - Configuration File |
| created on September-26-2010 |
Download
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| MR256A08B VERILOG Model |
This is the VERILOG model of the MR256A08B. MR256A08B.V is the abstracted model of a 32K x 8 MRAM. The following is contained in the download:
1. Readme_MR256A08B - Overview
2. MR256A08B.V - Device Model
3. Config_MR256A08B.V - Configuration File |
| created on September-26-2010 |
Download
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| MR25H10 VERILOG Model |
This is the VERILOG model of the MR25H10. MR25H10.V is the abstracted model of the 1Mb SPI MRAM. The following is contained in the download:
1. Readme_MR25H10 - Overview
2. MR25H10.V - Device Model
3. Config_MR25H10.V - Configuration File |
| created on September-26-2010 |
Download
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| MR25H256 VERILOG Model |
This is the VERILOG model of the MR25H256. MR25H256.V is the abstracted model of the 256Kb SPI MRAM. The following is contained in the download:
1. Readme_MR25H256 - Overview
2. MR25H256.V - Device Model
3. Config_MR25H256.V - Configuration File |
| created on September-26-2010 |
Download
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| MR2A08A VERILOG Model |
This is the VERILOG model of the MR2A08A. MR2A08A.V is the abstracted model of a 512K x 8 MRAM. The following is contained in the download:
1. Readme_MR2A08A - Overview
2. MR2A08A.V - Device Model
3. Config_MR2A08A.V - Configuration File |
| created on September-26-2010 |
Download
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| MR2A16A VERILOG Model |
This is the VERILOG model of the MR2A16A. MR2A16A.V is the abstracted model of a 256K x 16 MRAM. The following is contained in the download:
1. Readme_MR2A16A - Overview
2. MR2A16A.V - Device Model
3. Config_MR2A16A.V - Configuration File
4. testbench_MR2A16A.v - Test bench file |
| created on September-26-2010 |
Download
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| MR4A16B VERILOG Model |
This is the VERILOG model of the MR4A16B. MR4A16B.V is the abstracted model of a 1Mb x 16 MRAM. The following is contained in the download:
1. Readme_MR4A16B - Overview
2. MR4A16B.V - Device Model
3. Config_MR4A16B.V - Configuration File |
| created on September-26-2010 |
Download
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| MR0A08B VHDL Model |
This is the VHDL model of the MR0A08B. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR0A08B
2. MR4A16B.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR0A08B_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR0A08B.txt - Memory Initialization File |
| created on July-30-2010 |
Download
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| MR256A08B VHDL Model |
This is the VHDL model of the MR256A08B. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR256A08B
2. MR256A08B.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR256A08B_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR256A08B.txt - Memory Initialization File |
| created on August-04-2010 |
Download
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| MR25H10 VHDL Model |
This is the VHDL model of the MR25H10. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR25H10
2. MR25H10.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR25H10_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR25H10.txt - Memory Initialization File |
| created on August-27-2010 |
Download
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| MR25H256 VHDL Model |
This is the VHDL model of the MR25H256. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR25H256
2. MR25H256.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR25H256_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR25H256.txt - Memory Initialization File |
| created on August-27-2010 |
Download
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| MR2A08A VHDL Model |
This is the VHDL model of the MR2A08A. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR2A08A
2. MR2A08A.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR2A08A_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR2A08A.txt - Memory Initialization File |
| created on July-30-2010 |
Download
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| MR2A16A VHDL Model |
This is the VHDL model of the MR2A16A. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR2A16A
2. MR2A16A.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR2A16A_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR2A16A.txt - Memory Initialization File |
| created on August-04-2010 |
Download
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| MR4A16B VHDL Model |
This is the VHDL model of the MR4A16B. This is a high level abstraction of this product. The following is contained in the download:
1. Readme_MR4A16B
2. MR4A16B.vhdl - Device Model
3. Package_Utility - Standard Conversion Utilities
4. Benchtest.vhdl - Top Level Test Bench
5. MR4A16B_Driver.vhdl - Sample Test Vectors used for the Verification
6. MR4A16B.txt - Memory Initialization File |
| created on August-04-2010 |
Download
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